Microcontrollers (MCU's) are used in many applications to manage the activity and flow of operation in the system. Examples of MCU's are the 8031/8051 (Intel), 68HC11 (Motorola), and the Z8 (Zilog). In order for the MCU to be able to control the system, the user has to connect memories, i.e. electrically programmable read only memories (EPROMs) or static random access memories (SRAMs), Input/Output peripherals (I/O Ports, Timers, Serial peripherals, LED drivers, etc. ) as required by the application. Usually, EPROMs store the application program and SRAMs store the data. The MOU executes the program by fetching instructions from the EPROM and manipulating the data in the SRAM. In addition, the MCU has to control the data transfer from or to the peripherals.
To perform these operations and control the data flow in the system, the MCU has three busses: address, data, and control. At any given time only one of the external devices connected to the MCU can be accessed (i.e. data written to or read from the device). Because all the external devices are connected to a single data bus, there is a need to specify which one of the devices is currently being accessed. This is done by assigning different address space to different devices. For example, an 8-bit MCU that needs to access a 32K.times.8 EPROM, a 8K.times.8 SRAM and four peripherals each requiring 2K.times.8 of address will need a total of 48K.times.8 addresses (32K+8K+4.times.2K). If the MCU has 16 bits of address lines (address bus), then the total available address space is 64K.times.8 which satisfies the requirements of this particular example. An external address decoder generates select signals to the peripherals for each address that the MCU outputs on the address lines. In this manner, the MCU controls the data flow from or to the external peripherals on a single data bus.
However, as system requirements for memory and peripheral devices grow, there is a need to access a larger address space than is available by the MCU. Most controllers do not have more than 16 address lines which limit their address space to 64K. In the above example if the EPROM density is 128K.times.8, then the total required address space is 144K which exceeds the capabilities of the MCU.
To overcome this problem, a page register is typically introduced into the system. The page register can be loaded directly from the data bus while the output lines are used as additional address lines. For example, a 4-bit page register in a 16 address line MCU adds 4 address lines resulting in a total of 20 equivalent address lines. This register extends the address capability of the MCU from the 64 K to the 1 M address range. In effect, the MCU has 16 pages of 64 K core addresses of the MCU. The MCU programmer loads new values into the page register each time an interpage access is required. To facilitate this loading, the page register has an address assigned to it in the MCU address space. This specific address must be independent of the page currently being used in order for the program to move between the pages. Other peripherals in the system may have addresses that appear only in a specific page.
In addition, the system must read the page value from the page register into the MCU. This feature is especially important when an interrupt occurs which requires transfer of program execution to the interrupt service routine. After the interrupt is serviced, the program restores execution of the interrupted program by loading the previous value into the page register. Because interrupts can occur at any time, the interrupt service routine also has to be independent of the current accessed page.
For example, in U.S. Pat. No. 4,685,084 a product is disclosed which permits a read-only memory (ROM) to be programmed to operate in one of two addressing modes. In one mode, the memory operates as an ordinary ROM. In the alternate mode, not all of the address lines are used, thereby freeing address space to access other devices. In this product, an EPROM having a 64 K.times.8 memory configuration can appear as one block or can be segmented into four blocks of 16K.times.8 memory configuration. However, external logic for decoding is needed to take advantage of the freed address space. This external logic contributes to the expense and size of the product. Additionally, the product necessitates continuously programming between the two modes of operation. This programming is time-consuming and inconvenient for the user. In addition, the page mode selection is dependent upon the actual page the user is in. Finally, the location of the actual current page during interrupt cannot be read into the MCU.
Therefore, a need arises for a page register that increases the address capability of the MCU without external logic while ensuring that the location of the page register is independent of the actual page the user is in.